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Chips JU

Chips JU approaches key deadlines for its calls

At a glance: the essentials of this article

The Chips Joint Undertaking keeps its calls open to strengthen the European semiconductor value chain, from design and manufacturing infrastructures to applied research in electronic systems. With deadlines falling mainly in May, these initiatives aim to accelerate technology transfer to industry.

Advanced packaging. It promotes common standards and strengthens the European chiplet and heterogeneous integration supply chain.
From lab to fab. The lab to fab accelerators transfer technologies from pilot lines to industrial deployment.
AI-driven engineering. The call on software-defined vehicles develops open platforms integrating artificial intelligence-based tools.
Market-oriented projects. The Innovation Actions fund developments at TRL 5–8 with industrial deployment plans in Europe.
Early-stage research. The Research and Innovation Actions support prototypes and validations at TRL 3–4 to reinforce the European ecosystem.

The opportunities offered by the Chips Joint Undertaking – the European partnership created to strengthen the semiconductor value chain from research to manufacturing – remain open. The deadline for submitting proposals to this year’s calls falls, in most cases, on 7th May, although one sets a different date. “The objective of these initiatives is to bring research closer to industry, foster advanced manufacturing and integration, and support start-ups and SMEs seeking to take their ideas to the next level,” says Iñaki Armendáriz, European Projects consultant at Zabala Innovation and an expert on Chips JU. “More specifically, they aim to accelerate Europe’s leap from lab to fab and ensure that developments emerging from research centres come to life in real-world applications,” he adds.

Chips for Europe

The first pillar focuses on building technological capacities and strategic infrastructures. It includes pilot lines in low-power transistor technologies below 10 nanometres, leading-edge nodes below 2 nanometres, heterogeneous system integration, integrated photonic circuits and wide band-gap materials. It also covers developments in FD-SOI technologies and quantum chips.

In addition, it foresees the creation of a large-scale European design platform to facilitate testing, validation and experimentation, as well as a network of competence centres across Member States. These infrastructures will be open to companies, research organisations, designers and SMEs from a range of industrial sectors.

Boosting cooperation for industrial implementation on advanced packaging of chiplets and heterogeneous integration in Europe (7th May)

Within this pillar, one call focuses on industrial cooperation in advanced packaging and heterogeneous integration. The action seeks to strengthen the European supply chain, assess vulnerabilities in sectors such as automotive, aerospace, healthcare and telecommunications, reduce the environmental footprint of manufacturing and promote common standards to improve interoperability and shorten time to market. It also envisages the development of a shared roadmap between research and industry, along with specialised training programmes.

Lab to fab accelerators for advanced packaging and heterogeneous integration (7th May)

Another key line concerns the so-called lab to fab accelerators, designed to speed up the transfer of technologies from pilot lines to industrial deployment. These projects must involve actors across the entire value chain, from materials and equipment suppliers to packaging companies and industrial customers, in order to consolidate a European innovation ecosystem in advanced packaging.

ECS R&I

The second major pillar corresponds to the calls for research and innovation in electronic components and systems, known as ECS R&I. These actions complement the capacities developed under Chips for Europe and cover areas such as artificial intelligence, high-performance computing, cybersecurity and digital infrastructures.

AI-assisted methods and tools for software-defined vehicle engineering automation (3rd March)

This call aims to develop open platforms integrating AI-based tools, including generative techniques, to improve efficiency, reduce costs and manage complex systems throughout the entire product lifecycle. Demonstrations are planned in the automotive sector, alongside pilot studies in other fields such as healthcare and industry.

Innovation Actions global call according to SRIA 2026 (two stages: 7th May and 17th September)

This call targets projects at intermediate and advanced technology readiness levels (TRL 5–8), with a strong industrial focus. Proposals must be driven by consortia with significant business participation, alongside universities and technology centres, and rely on innovative technologies validated in near-market environments such as pilot lines or test facilities. A deployment plan ensuring economic value creation in Europe is required. Chips JU will select a balanced portfolio of projects in terms of size, technology and application sector.

Research and Innovation Actions global call according to SRIA 2026 (two stages: 7th May and 17th September)

This call focuses on earlier stages of technological development, primarily at TRL 3–4. It funds applied research and the validation of new technologies or tools through small-scale prototypes in laboratory environments. Consortia, comprising companies and research organisations, must demonstrate the feasibility of the solution and its contribution to the European semiconductor ecosystem. The final selection will seek a balance between developed technologies and application sectors.